As semiconductor devices become smaller and lighter, more and more functions are integrated onto a single chip. Most semiconductor devices incorporate capacitors. A polysilicon-insulator-polysilicon (PIP) capacitor obtained by having a thin dielectric layer interposed between polysilicon layers may be incorporated into an analog semiconductor device. The method of manufacture of a PIP capacitor is advantageous for such purposes.
However, incorporating multiple polysilicon layers in a semiconductor logic device is extremely difficult. The characteristics of a PIP capacitor are significantly affected by process conditions. In fact, the capacitance may vary significantly with a small change in the size, and/or in the resistance of the polysilicon layer.
FIG. 1 is a sectional view schematically illustrating a method of forming a PIP capacitor.
Referring to FIG. 1, a first polysilicon layer 21 used as the gate of a transistor is formed over a semiconductor substrate 10. Then, after rendering a portion of the layer conductive using PCl3 and forming a tungsten silicide layer (WSix) 23, an anti-reflection coating layer (ARC) 25, made up of a TiN layer, is formed. Then, an additional polysilicon layer 27 is formed over the anti-reflection coating layer 25. The additional polysilicon layer 27 can actually be understood as a lower electrode of the PIP capacitor, and may function as a terminal, being an underlayer of the capacitor.
Thus, while a gate is formed within a cell region, the lower electrode 20 of the PIP capacitor is formed in a peripheral circuit region.
An oxide layer is formed to function as dielectric layer 30 of the PIP capacitor. A second polysilicon layer 40 is formed over the dielectric layer 30. Afterwards, the second polysilicon layer 40 is etched using a patterning mask, thereby forming an upper electrode. Then, after forming an interlayer insulating layer 50, a first contact 51 is formed in the interlayer insulating layer 50 to connect to the second polysilicon layer 40 and a second contact 53 is formed to connect to the lower electrode 20. In this manner, a PIP capacitor may be formed using polysilicon layers to sandwich an insulating layer.